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A SystemC-based verification methodology for complex wireless software IP

机译:用于复杂无线软件IP的基于系统的验证方法

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The implementation of a complex hardware intellectual property (IP) together with complex lower-level software and the integration into a system platform poses tough challenges to the design and verification engineers. Traditionally, embedded software is developed and tested towards the end of the development cycle because of late availability of lab prototype equipment and hardware IP. In this paper, a "software-centric" hardware/software implementation and verification methodology for a 3G WCDMA modem is presented, with emphasis on physical layer software design and early verification. The subsystem architecture of 3G hardware and software is presented along with design and verification steps carried out. A versatile SystemC-based test environment is described, which links test case modules producing the stimuli from protocol stack and hardware components to the L1 SW code, executed on a instruction set simulator.
机译:将复杂的硬件知识产权(IP)与复杂的较低级别软件的实现以及集成到系统平台上对设计和验证工程师构成了艰难的挑战。传统上,由于实验室原型设备和硬件IP的延迟可用性,开发并测试了嵌入式软件并测试了开发周期结束。在本文中,提出了一个“以”3G WCDMA调制解调器的“软件中心”硬件/软件实现和验证方法,重点是物理层软件设计和早期验证。 3G硬件和软件的子系统架构以及执行的设计和验证步骤。描述了一种基于多功能的Systemc的测试环境,该测试环境将从协议栈和硬件组件从协议栈和硬件组件的刺激链接到L1 SW代码,在指令集模拟器上执行。

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