Design and Implementation of High Speed RS Encoder

摘要

Design and implementation of high speed RS encoder is concerned over the extended dual basis. The method of obtaining the optimal dual basis is introduced and the optimal dual basis is calculated for the CCSDS RS code. Instead of the bit-serial encoder, a bit-parallel dual basis RS encoder is designed for high speed applications. The result obtained by timing simulation shows that the throughput of the prototype can be up to 125Mbytes/s.