Summary form only given. Screening at the wafer level to exploit lot-to-lot variability is considered. The yield is modeled using an empirical Bayes framework: the number of bad chips on each wafer in a given lot is a gamma random variable, and the scale parameter is unknown and varies from lot to lot according to another gamma distribution. The resulting problem is an optimal stopping problem embedded within a mathematical program, and the optimal solution is determined numerically. Screening at the chip level to exploit various dependencies is discussed, and a variety of chip screening policies are identified. A predictive performance analysis is undertaken to estimate the appropriate start rate of wafers for some of these policies. Both yield models are fitted to industrial data from several different facilities, and the proposed and derived policies are tested on the actual data. It is found that significant increases in throughput, can be obtained. Chip screening policies that effectively exploit the various yield dependencies to distinguish between good and bad chips are identified.
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