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Efficient hierarchical interconnection for multiprocessor systems

机译:多处理器系统的高效分层互连

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The authors present a novel approach to the design of a class of hierarchical interconnection networks for multiprocessor systems. This approach, based on an architecture providing separate networks for each level, gives a general and flexible way to construct efficient hierarchical networks. The performance and cost-effectiveness of the resulting networks are analyzed and compared in detail, using both unbuffered and buffered network models. It is shown that, if the design parameters are determined based on the degree of locality, the cost-effectiveness of a hierarchical network can be significantly improved. In addition, the authors investigate how to construct a cost-effectiveness hierarchical network by determining appropriate design parameters. Two associated algorithms are developed for this purpose.
机译:作者呈现了一种用于多处理器系统的一类层级互连网络的设计方法。这种方法基于为每个级别提供单独的网络的架构,给出了构建有效的层次网络的一般和灵活的方法。使用无缓冲和缓冲的网络模型详细分析并比较了所得网络的性能和成本效益。结果表明,如果基于局部度确定设计参数,则可以显着提高分层网络的成本效益。此外,作者还通过确定适当的设计参数来调查如何构建成本效益分层网络。为此目的开发了两个相关的算法。

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