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A RECONFIGURABLE DIGITAL IC TESTER IMPLEMENTED USING THE ARM INTEGRATOR RAPID PROTOTYPING SYSTEM

机译:使用ARM Integrator Rapid Prototicing系统实现的可重构数字IC测试仪

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We describe the implementation of a low-cost, highly-reconfigurable digital integrated circuit (IC) tester using the ARM Integrator ARM7TDMI-based Rapid Prototyping System (RPS). The IC tester is controlled through a user interface application that runs on the RPS personal computer (PC) host. Test vectors and expected response vectors are developed off-line and then downloaded via the PC into the tester's pattern memory, which is implemented in the RPS's SDRAM. The test vectors are then applied at up to 20 MHz to the inputs of the device under test (DUT) using no-return-to-zero (NRZ) formatting; meanwhile, the DUT output signals are sampled mid-cycle and the resulting actual response vectors are compared against stored expected responses to determine if the DUT is functioning properly. A Xilinx Virtex-E field-programmable gate array (FPGA) in the RPS is used to implement the pipeline that demultiplexes and formats the test vectors, compares actual and expected response vectors, and collects failure statistics. The FPGA is also used to implement the expected response memory. When the test has finished, the actual responses and comparison results can be uploaded from the FPGA RAM to the PC and stored in a text file.
机译:我们使用基于ARM Integrator ARM7TDMI的快速原型系统(RPS)来描述低成本,高度可重新配置的数字集成电路(IC)测试仪的实现。 IC测试仪通过在RPS个人计算机(PC)主机上运行的用户界面应用程序来控制。测试向量和预期的响应矢量在线开发,然后通过PC下载到测试仪的模式存储器中,该存储器在RPS的SDRAM中实现。然后,使用无返回到零(NRZ)格式,测试向量在高达20MHz上施加到测试(DUT)的设备的输入;同时,DUT输出信号被采样中期,并将得到的实际响应向量与存储的预期响应进行比较,以确定DUT是否正常运行。 RPS中的Xilinx Virtex-E现场可编程门阵列(FPGA)用于实现多路复用和格式化测试向量的流水线,比较实际和预期的响应向量,并收集失败统计数据。 FPGA还用于实现预期的响应存储器。当测试完成后,实际的响应和比较结果可以从FPGA RAM上传到PC并存储在文本文件中。

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