SIMULATION OF CAPACITY AND COST FOR PLANNING OF FUTURE PROCESS CHAINS

摘要

One of the most promising approaches in modern microelectronics is the introduction of 3D chip micro systems with TSVs (through-silicon via) interconnections. Successfully transferring this new technology from science level up to the level of mass production is not least a matter of cost-effectiveness and profit, which is directly related to high productivity. The developed technologies therefore have to be feasible for effective mass production. In this paper we introduce a method for planning and evaluating costs in future process chains. This method goes beyond usual mostly excel-supported solutions, as it is based on a discrete event simulation system. The simulation model is generically generated out of an XML process chain definition file and includes a sophisticated state model for machines. Multiple process scenarios are created with the help of a supporting software tool. These scenarios are investigated for achieving favor equipment and process chain configurations as well as control strategies to support manufacturing ramp-ups.