Cramer-Rao Lower Bound for A/D and D/A Converters Linearity Testing: Performance of integral nonlinearity estimation with Gaussian and sinusoidal test signals

摘要

This paper reports the derivation of the Cramer-Rao lower bound for the estimation of the code transition levels of an analog-to-digital converter (ADC) and of the output levels of a digital-to-analog converter (DAC). Numerical results for the estimation of the integral nonlinearity are given. The converters are tested by sampling many times, with the ADC, each dithered output level of the DAC. The general case is discussed in which the dithering signal is the sum of Gaussian noise and a sine wave. The parameters of ADC, DAC, noise and sine wave can be estimated at the same time.