首页> 外文会议>IEEE International Conference on Indium Phosphide Related Materials >Progress and Challenges in the Direct Monolithic Integration of III-V Devices and Si CMOS on Silicon Substrates
【24h】

Progress and Challenges in the Direct Monolithic Integration of III-V Devices and Si CMOS on Silicon Substrates

机译:III-V器件直接整合的进展与挑战硅基板上的SI CMOS

获取原文

摘要

We present results on the direct monolithic integration of III-V devices and Si CMOS on a silicon substrate. Through optimization of device fabrication and material growth processes III-V devices with electrical performance comparable to devices grown on native III-V substrates were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). While the results presented here are for InP HBTs, our direct heterogeneously integration approach is equally applicable to other III-V electronic (FETs, HEMTs) and opto-electronic (photodiodes, VSCLS) devices and opens the door to a new class of highly integrated, high performance, mixed signal circuits.
机译:我们在硅衬底上呈现III-V器件和Si CMO的直接整合。通过优化装置制造和材料生长过程III-V具有与天然III-V衬底上生长的器件相当的电气性能的装置,直接在硅模板晶片或鞋底上的CMOS晶体管相邻的窗口中直接生长(晶格上的硅晶圆上)。虽然此处呈现的结果用于INP HBT,但我们的直接非渗透集成方法同样适用于其他III-V电子(FET,HEMT)和光电(光电二极管,VSCLS)器件,并打开新型高度集成的门,性能高,混合信号电路。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号