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Optimal power/performance pipelining for error resilient processors

机译:误差弹性处理器的最佳功率/性能流水线

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Timing speculation has been proposed as a technique for maximizing the energy efficiency of processors with minimal loss in performance. A typical implementation of timing speculation involves speculatively reducing the voltage of a processor to a point where errors are possible but rare, and employing an error recovery mechanism to ensure correct functionality. This allows significant energy savings with a small recovery overhead.
机译:已经提出了定时猜测作为最大化处理器的能量效率的技术,性能损失最小。定时猜测的典型实现涉及引用处理器的电压降低到错误的点,而是罕见的,并且采用错误恢复机制以确保正确的功能。这允许具有小恢复开销的显着节省。

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