We present a new architecture of Advanced Encryption Standard (AES) cryptographic circuit which can be used as cryptographic primitives supporting privacy and authentication for Radio frequency identification (RFID). RFID is a technology to identify goods or person containing the tags. While it is a convenient way to track items, it also provides chances to track people and their activities through their belongings. For these reasons, privacy and authentication are a major concern with RFID system and many solutions have been proposed. M. Feldhofer, S. Dominikus, and J. Wolkerstorfer introduced the Interleaved Protocol which serves as a means of authenticating RFID tag to reader devices in [14]. They designed very small AES hardware circuit as a cryptographic primitive. The proposed circuit requires about 1,000 clock cycles to encrypt a 128-bit block of data. In this contribution, we introduce a novel method to increase the operating speed of previous method for low-cost AES cryptographic circuits. Our low-cost AES cryptographic circuit can encrypt 128-bit data block within 870 clock cycles using less than 4000 gates on a 0.25μm CMOSprocess.
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