首页> 外文会议>Conference on Ph.D. Research in MicroElectronics and Electronics >An RTL-to-Grid Design Flow for Power Grid Verification Based on a Statistical Estimation Engine
【24h】

An RTL-to-Grid Design Flow for Power Grid Verification Based on a Statistical Estimation Engine

机译:基于统计估计引擎的电网验证RTL对网格设计流程

获取原文

摘要

The most important reliability problem of modern power distribution networks is the voltage drop or IR-drop problem. In this paper we present a design flow based on industrial tools for power grid verification, where the grid is modeled as a linear resistive network and the necessary maximum current estimates are statistically obtained by recent advances in the field of extreme value theory. Experimental results include the verification of power grid for a choice of different real designs.
机译:现代配电网络最重要的可靠性问题是电压降或IR滴问题。在本文中,我们提出了一种基于工业工具的设计流程,用于电网验证,其中网格被建模为线性电阻网络,并且通过极端值理论领域的最近进步统计地获得必要的最大电流估计。实验结果包括验证电网,用于选择不同的真实设计。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号