The paper focuses on modelling and analysis of influence of internal converters nonlinearities in sub-optimal intelligent cyclic A/D converters (IC ADC) whose backgrounds and architecture were presented and analysed in works [1-5] and others. The knowledge of influence of internal A/D converter nonlinearities errors on IC ADC conversion performance enables determining requirements for ADC{sub}(In) which are of crucial importance for design and practical implementation of IC ADC.
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