Controlling injected electron and hole profiles for better reliability of split gate SONOS

摘要

SONOS memory cell using a split gate structure is studied using simulations. The dependence of channel hot electron (HE) and hot hole (HH) profiles (during program and erase) on bias, doping, and program gate length (L/sub PG/) is studied. The effect of trapped charge position on the threshold voltage is also studied. L/sub PG/ is found to be crucial in minimizing the mismatch of HE and HH profiles as the regions of their generation are separate. Program gate voltage during program and erase is found to be the key bias for spatially adjusting the HE and HH profiles.