DRAM chips; low-power electronics; molecular electronics; storage management; capacitors; cache storage; memory architecture; ZettaRAM; low-power memory systems; memory technology; ZettaCore; DRAM; charge-storage molecules; molecular capacitor; discrete threshold voltage; peripheral circuitry; performance limiter; memory architectural management; row buffer misses; scheduling flexibility; extended molecule latency; hybrid write policy; delayed writebacks; eager writebacks; memory controller; dual-speed writes;
机译:定位Bluetooth / spl reg /和Wi-Fi / spl trade /系统
机译:H / sub / spl infin //具有/ spl alpha /稳定性约束的无记忆控制,用于时滞系统:LMI方法
机译:具有自校准500- / spl mu / V偏移的低功耗CMOS九通道40MHz二进制检测系统
机译:点击ZettaRAM / spl trade /用于低功耗存储系统
机译:低功耗系统的基于自旋的逻辑和存储技术。
机译:基于快速和低功耗微机电系统的非易失性存储设备
机译:为低功耗存储器系统开发ZettaRam
机译:潜水器推进系统(Tapss)的权衡分析。