Capping copper interconnects in microelectronic devices with metal alloys such as cobalt alloys enhances electromigration reliability, improves spectral response in optical paths, and reduces the effective dielectric constant of the interlevel dielectric stack and thus reduce RC delay. For this purpose, both palladium-activated CoWP deposition processes and self-initiated CoWPB deposition processes have been investigated. In general, while special attention needs to be paid to such issues as copper etching, particularly the preferential etching of copper at copper grain boundaries and at the copper/barrier interface, and nodular growth, the palladium-activated CoWP deposition process exhibits good selectivity and coverage. In contrast, the self-initiated CoWPB deposition process offers the advantages of insignificant copper etching and favorable deposit surface morphology. In the meantime, the selectivity and bath stability issues associated with the selfinitiated deposition process have to be properly addressed. At the optimized process conditions, smooth, solid, and essentially nodulefree CoWP and CoWPB deposits have been obtained. Capping copper interconnects using the developed deposition processes has also been demonstrated.
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