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Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model

机译:具有共享内存通信模型的并行Java程序的设计时数据访问分析

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In the era of future embedded systems the designer is confronted with multi-processor architectures both for performance and energy reasons. Exploiting (sub)task-level parallelism is becoming crucial because the instruction-level parallelism alone is insufficient. The challenge is to build compiler tools that support the exploration of the task-level parallelism in the programs. To achieve this goal, we have designed an analysis framework to estimate the potential parallelism from sequential object-oriented programs in Java. Data-access analysis is one of the crucial techniques for estimation of the transformation effects. We have implemented support for platform-independent data-access analysis and profiling of Java programs. Herein, we focus on the technique for design-time data-access analysis. It complements our earlier work on parallel performance analysis. We demonstrate the feasibility and effectiveness of our approach on a number of Java applications.
机译:在未来嵌入式系统的时代,设计师面对性能和能量原因的既有多处理器架构。剥削(子)任务级并行性正变得至关重要,因为单独的指令级并行性不足。挑战是构建支持探索程序中任务级并行性的编译器工具。为实现这一目标,我们设计了一个分析框架,以估计Java中的顺序面向对象的程序的潜在并行性。数据访问分析是用于估计变换效果的重要技术之一。我们已为支持平台无关的数据访问分析和剖析Java程序的支持。这里,我们专注于设计时间数据访问分析的技术。它补充了我们早先关于并行性能分析的工作。我们展示了我们在许多Java应用程序上的方法的可行性和有效性。

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