Degradation Factors for Eye Diagrams Using FDTD-SPICE

摘要

This paper examines several contributors to eye diagram degradation in high-speed digital systems. The eye diagrams are generated through a combination of full wave simulation and circuit analysis. The interconnect part of the analyzed structure is first characterized in terms of S parameters obtained with the finite difference time domain (FDTD) method. The resulting S parameters are used together with the convolution approach to perform time domain simulation of the complete circuit in SPICE.