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A 46pJ/pulse analog front-end in 130nm CMOS for UWB impulse radio receivers

机译:用于UWB脉冲无线电接收器的130nm CMOS中的46pj /脉冲模拟前端

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This paper presents an integrated ultra-low power analog frontend architecture for UWB impulse radio receivers. The receiver is targeted towards applications like wireless sensor networks and body-area networks typically requiring ultra energy-efficient, low data-rate communication over a relative short range. The proposed receiver implements pulse correlation in the analog domain to severely relax the power consumption of the ADC’s and digital backend. Furthermore a fully integrated prototype of the analog front-end, containing an analog pulse correlator, a linear-in-dB variable gain amplifier and a 4-bit ADC, is demonstrated. Several design decisions and techniques, like correlation with a windowed LO instead of with a matched template, exploiting the duty-cycled nature of the system, operation in the sub-1GHz band as well as careful circuit design are employed to reach ultra-low power consumption. The analog front-end was manufactured in 130nm CMOS and the active circuit area measures only 600μm × 730μm. A maximum channel conversion gain of 50dB can be achieved. The AFE consumes 1.44mA at 1.2V power supply and operates at a pulse rate of 37.5Mpulses per second. This corresponds to an energy consumption of 46pJ/pulse which is by far best-in-class. A wireless link over more than 3.5m in an office-like environment has been demonstrated which makes the proposed receiver well suited for the targeted applications.
机译:本文介绍了用于UWB脉冲无线电接收器的集成超低功耗模拟前端架构。接收器针对无线传感器网络和身体区域网络等应用,通常需要超能量,低数据速率通信在相对短的范围内。所提出的接收器实现模拟域中的脉冲相关性,严重放松ADC和数字后端的功耗。此外,还证明了包含模拟脉冲相关器,线性IN-DB可变增益放大器和4位ADC的模拟前端的完全集成的原型。几个设计决策和技术,如与窗口的LO相关的相关性,而不是与匹配的模板相关,利用系统的核心内容,在Sub-1GHz频带以及仔细的电路设计中的操作来达到超低功耗消耗。模拟前端在130nm CMOS中制造,主动电路面积仅衡量600μm×730μm。可以实现50dB的最大信道转换增益。 AFE在1.2V电源下消耗1.44mA,并以每秒37.5mmps的脉冲速率运行。这对应于46pj /脉冲的能量消耗,该脉冲是迄今为止的。已经证明了办公环境中超过3.5米以上的无线链路,这使得提出的接收器适合于目标应用。

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