Power Distribution System for JEDEC DDR2 Memory DIMM

摘要

The Power Distribution System (PDS) for a JEDEC DDR2 Dual Inline Memory Module (DIMM) has been designed. The process involved establishing a target impedance in the frequency domain, determining the inductance of the connector and capacitor mounts and selecting a matrix of discrete ceramic capacitors from a menu of previously characterized devices to meet the target impedance. After hardware was available, S21 measurements were made with a 2 port VNA to establish model to hardware correlation.