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Use of PLDs to illustrate fundamental concepts in switching and logic

机译:使用PLD来说明切换和逻辑中的基本概念

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This paper discusses the application of programmable logic devices (PLDs) to enhance the understanding of digital design at the University of Akron. Switching and Logic course has often been taught as a classical engineering class where students have little or no hands-on experience, and sometimes have difficulty in understanding the basic concept. With the availability of lower-cost, digital and logic components, and test equipment, this is changing. For freshman and sophomore engineering students taking an introduction to digital design, one must make sure that error in implementation such as wiring errors do not prevent the concept of design from getting through. To ease implementation problems at the university, programmable logic devices in the form of ICT PEELs and PEEL arrays are used with motherboard and daughter boards. The configuration tools are easy to use and available at no cost to the students for home use. Two and multilevel implementation are investigated for both combinational and sequential networks. The motherboard, daughter board combination was locally developed allowing their resources to closely track the accompanying laboratory exercises. By reducing wiring to a minimum laboratory, exercises can range from analysis to design and be accomplished in the allotted threehour period. The overall effectiveness of this instructional model has been positive, and this continues to be used and expanded.
机译:本文讨论了可编程逻辑器件(PLD)的应用,增强了阿克伦大学数字设计的理解。切换和逻辑课程经常被教授作为学生几乎没有动手经验的经典工程课程,有时难以理解基本概念。随着较低成本,数字和逻辑组件的可用性和测试设备,这正在发生变化。对于新生和二年级学生进行数字设计介绍,必须确保在线错误等实现中的错误不会阻止设计的概念。为了简化大学的实施问题,以ICT剥离形式的可编程逻辑器件和Peel阵列与主板和子板一起使用。配置工具易于使用,并且可以为学生提供易用的家庭使用。针对组合和顺序网络调查了两个和多级实现。主板,女儿板组合在本地开发,允许其资源密切追踪随附的实验室练习。通过将布线减少到最低实验室,练习可以从分析到设计,并在分配的三个时间内完成。该教学模型的整体效力是积极的,这继续使用和扩展。

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