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Use of PLDs to illustrate fundamental concepts in switching and logic

机译:使用PLD来说明交换和逻辑中的基本概念

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This paper discusses the application of programmable logic devices (PLDs) to enhance the understanding of digital design at the University of Akron. The Switching and Logic course has often been taught as a classical engineering class where students have little or no hands-on experience, and sometimes have difficulty in understanding the basic concept. With the availability of lower-cost, digital and logic components, and test equipment, this is changing. For freshman and sophomore engineering students taking an introduction to digital design, one must make sure that error in implementation such as wiring errors do not prevent the concept of design from getting through. To ease implementation problems at the university, programmable logic devices in the form of ICT PEELs/sup TM/ and PEEL/sup TM/ arrays are used with motherboard and daughter boards. The configuration tools are easy to use and available at no cost to the students for home use. Two and multilevel implementation are investigated for both combinational and sequential networks. The motherboard, daughter board combination was locally developed allowing their resources to closely track the accompanying laboratory exercises. By reducing wiring to a minimum laboratory, exercises can range from analysis to design and be accomplished in the allotted three-hour period. The overall effectiveness of this instructional model has been positive, and this continues to be used and expanded.
机译:本文讨论了可编程逻辑器件(PLD)的应用,以增强阿克伦大学对数字设计的理解。交换和逻辑课程通常作为经典工程课程进行讲授,在该课程中,学生几乎没有实践经验,有时甚至难以理解基本概念。随着低成本,数字和逻辑组件以及测试设备的推出,这种情况正在改变。对于刚开始学习数字设计的大一和大二工程专业的学生,​​必须确保实现错误(例如接线错误)不会阻止设计概念的普及。为了缓解大学的实施问题,主板和子板使用了ICT PEELs / sup TM /和PEEL / sup TM /阵列形式的可编程逻辑设备。配置工具易于使用,学生无需付费即可在家中使用。研究了组合网络和顺序网络的两层和多层实施。母板和子板的组合是在本地开发的,从而使它们的资源可以密切跟踪伴随的实验室练习。通过减少到最小实验室的布线,练习可以从分析到设计,并可以在指定的三个小时内完成。该教学模型的整体效果是积极的,并且将继续使用和扩展。

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