Heuristic approach for multi-objective hardware/software partitioning

摘要

The partitioning between hardware (HW) components and software (SW) components plays a major role in the codesign process of Embedded Systems (ES). Defining a good partitioning at early stage of the design allows improving the system performance, meeting the time to market and optimizing several other metrics. The majority of works made a focus on execution time and hardware area metrics while dealing with the hardware software partitioning (HSP) problem, and in some cases the power consumption metric was also taking in consideration. In this paper, we propose a novel approach in order to optimize simultaneously several metrics while respecting a constraint on global hardware area. The proposed approach is implemented using 0-1 Knapsack Problem (KP) algorithm. Experimental results show that the proposed algorithm is very fast and gives more reliable solutions comparing to Genetic Algorithm (GA) and Simulated Annealing (SA) algorithm.