首页> 外国专利> Low power hardware/software partitioning approach for core-based embedded systems

Low power hardware/software partitioning approach for core-based embedded systems

机译:基于内核的嵌入式系统的低功耗硬件/软件分区方法

摘要

A novel power minimizing hardware/software co-design approach is presented that partitions an embedded application into an application specific core and a software program that executes on a microprocessor core. As opposed to prior art approaches, the present approach is very comprehensive since it takes into consideration a whole embedded system. In addition, it partitions at the cost of a very small additional hardware effort. The experimental results show high energy savings while maintaining (or even slightly increasing) the performance of the initial design.
机译:提出了一种将硬件/软件协同设计的功耗最小化的新颖方法,该方法将嵌入式应用程序划分为专用内核和在微处理器内核上执行的软件程序。与现有技术方法相反,本方法非常全面,因为它考虑了整个嵌入式系统。另外,它以很少的额外硬件工作为代价进行分区。实验结果表明,在保持(甚至略微提高)初始设计性能的同时,可以节省大量能源。

著录项

  • 公开/公告号US6622287B1

    专利类型

  • 公开/公告日2003-09-16

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US20000521658

  • 发明设计人 JOERG HENKEL;

    申请日2000-03-08

  • 分类号G06F175/00;

  • 国家 US

  • 入库时间 2022-08-22 00:06:37

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号