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Low power bus encoding with crosstalk delay elimination

机译:用串扰延迟消除的低功率总线编码

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In deep-submicron (DSM) technology, minimizing the propagation delay and power consumption on buses are two of the most important design objectives in system-on-chip (SOC) design. In particular, coupling effects between wires on the bus cause serious problems such as crosstalk delay, noise, and power consumption. Most of the previous works on bus encoding are targeted either (1) to minimize the power consumption on bus or (2) to minimize the crosstalk delay, but not both. In this paper, we propose a new bus encoding algorithm which not only minimizes the dynamic power consumption on bus but also eliminates the crosstalk delay. We achieve the combined objective of (1) and (2) by analyzing, formulating and solving the problem of minimizing a weighted sum of the self transition and cross-coupled transition activities on bus in the context of the concept of self-shield encoding (whose fundamental theory is well studied recently in [5]). From experiments using a set of benchmark designs, it is shown that the proposed encoding technique consumes 15.4%-47.4% less power over the existing techniques, while totally eliminating the crosstalk delays.
机译:在深度亚微米(DSM)技术中,最大限度地减少了总线上的传播延迟和功耗是片上系统(SOC)设计中最重要的设计目标。特别是,总线上的电线之间的耦合效果导致严重的问题,例如串扰延迟,噪声和功耗。总线编码的大多数工作中的大多数工作都是(1),以最大限度地减少总线或(2)上的功耗,以最小化串扰延迟,但并非两者。在本文中,我们提出了一种新的总线编码算法,它不仅最大限度地减少了总线上的动态功耗,还可以消除串扰延迟。我们通过分析,制定和解决在自盾编码的概念的背景下最小化公共汽车上的自我转变和交叉耦合过渡活动的问题来实现(1)和(2)的组合目标。最近在[5])中研究其基本理论。从使用一组基准设计的实验,表明,所提出的编码技术对现有技术的功率降低了15.4%-47.4%,同时完全消除了串扰延迟。

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