Chip Scale Packaging or Chip on Board: A Study of Tradeoffs

摘要

In today's world of electronics the keywords are smaller, faster and cheaper. With more and more circuitry going onto existing circuit boards, the designers are searching for ways to contain this additionally functionality in the same, or smaller, space envelope. To accomplish this, the semiconductor die used in the circuit design must shed the traditional packaging enclosures. One solution is to solder bump the die and flip chip attach them to the circuit board (COB). However this presents assembly, quality and reliability issues that designers haven't faced in traditional package/circuit board design. Another solution to the problem is the use of Chip Scale Packaged (CSP) bare die. This paper identifies and discusses the technical and financial benefits and drawbacks of these two technologies.