Electrical characteristics of CeO/sub 2/ buffer layer for a FRAM

摘要

The CeO/sub 2/ films were formed on Si(111) substrate by radio frequency magnetron sputtering. Hysteresis was observed from the capacitance-voltage (C-V) characteristics of this sample. However, after the CeO/sub 2/-Si structure was annealed under O/sub 2/ ambient, the hysteresis almost disappeared due to SiO/sub 2/ layer formation between CeO/sub 2/ and Si. It is interesting that a counter-clockwise hysteresis loop was observed in the as-grown sample. On the other hand, a clockwise hysteresis loop was observed on the annealed sample. The annealed film showed high capacitance at accumulation due to the large dielectric constant, and a higher breakdown voltage due to the thin SiO/sub 2/ layer. It was found that Poole-Frenkel emission and Schottky emission are the conduction mechanisms for annealed films. The CeO/sub 2//SiO/sub 2//Si structure was shown to be a legitimate candidate for FRAM device applications.