Distribution of the noise voltage in the matrix VLSI with orthogonal topology of power supply feeding

摘要

In this paper new three-dimensional mathematical model of internal conductive noise in the matrix VLSI with orthogonal topology of power supply feeding have been discussed. Obtained relations allow for developer to compare different alternative variants of structure realization of digital devices. The obtained results are useful for the place-and-route procedure of development and/or manufacturing digital devices, implemented on the matrix VLSI.