The Design of A Parallel Processing Architecture for the Chinese Characters Recognition ASIC

摘要

In the recognition of Off-line Hand-script Chinese Characters, pattern matching process and feature vector extractions are the two main parts. The pattern matching process is a step of matching input pattern with large number of standard patterns. It spends about 80percent recognition time of whole system. It is the bottleneck of the recognition speed. We now explore the hardware design for the pattern matching process. And in order to fully improve the performance of this chip, we use a parallel processing architecture that includes multiple execution units, multi-layered pipeline, multiple calculating units, and feedback structure. Finally, using these methods, at the recognition accuracy of 98percent, we achieve a speed of over 200 characters per second.