A Design of Fractional-N Frequency Synthesizer with Quad-Band (700 MHz/AWS/2100 MHz/2600 MHz) VCO for LTE Application in 65 nm CMOS Process

摘要

This paper presents the design of a fractional-N frequency synthesizer for LTE application covering frequency band from 698 MHz to 2690 MHz, which is fabricated in a 65 nm CMOS process. The frequency of VCO was designed from 2.7 GHz to 6.1 GHz by three cores. Each VCO core has the 23 %～40 % tuning range that is obtained by means of a 6-bit binary-weighted capacitance array and a small varactor for fine tuning. Also in order to operate in a wide-band frequency range, AFC technique is used. A 3-bit third order MASH type △ -∑ modulator is employed to meet a frequency resolution of 20 Hz and improve the phase noise performance. The frequency synthesizer measures phase noise of -98 dBc/Hz at 10 KHz offset, -128 dBc/Hz at 5 MHz offset, -131 dBc/Hz at 7.5 MHz offset, integrated phase noise of 0.67° and a settling time of less than 150 us while operating LO frequency at 2.62 GHz. The implemented frequency synthesizer consumes 39 mA from 12 V power supply and meets the requirements of LTE application.