Moisture absorption and associated assembly problems become more likely with the proliferation of larger IC packages. Growing technology trends such as Ball Grid Array (BGA) packaging, "system on a chip" IC design, and multi-chip modules all drive the industry's move towards these larger package sizes. Board assemblers currently mitigate the yield losses due to "popcorning", delamination, and other moisture-related problems by limiting exposure and/or removing the moisture from components that have exceeded their recommended floor life. This paper, part of the Plastic Packaging Consortium effort led by National Semiconductor, assesses the costs to the industry on a per placement basis for delamination prevention. This paper highlights common protocols used at North American assembly facilities to handle moisture-sensitive components. In addition, the cost implications of these procedures to the assemblers are investigated using a method for modeling manufacturing costs, Technical Cost Modeling (TCM). In light of these costs and industry opinions, the opportunity for a moisture resistant packaging solution is discussed.
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