The noise immunity for the low voltage logic circuits

摘要

The authors present the general relation for the determination of the dynamic noise immunity for the interconnection of two digital circuits. They present the relations for determination of the parameters of the guaranteed and typical noise immunity: the amplitude of the voltage, duration (time), rise and fall time, phase difference, power and energy. For the low voltage logic circuit subfamilies (LV, LVC, LVT, ALVC) the parameters of guaranteed and typical noise immunity are calculated.