With the progress of silicon integration technology, visual information processing architecture has come a great change in the compactness of high performance processing circuits. In other words, the image processor is no longer considered as a desktop size equipment but rather as one chip information processing module with photodetector. The paper discusses the processing architecture for visual information processing in terms of the integrated massively parallel processing. A vision chip with general purpose processing elements is described and some examples of 1 ms image processing using the architectures is shown. The sampling rate of 1 ms leads to a new generation of image processing technology.
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