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Analog integrated circuit demonstrator for electronic engineering education

机译:电子工程教育模拟集成电路演示

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A demonstrator through the VLSI CMOS 2.5#mu#m double-poly process (CNM25) of the Centre Nacional de Microelectronica (CNM) only for teaching purposes has been implemented. This demonstrator allows not only the test using normal electronic lab instrumentation of simple analog building blocks and more complex circuits through external connections but also the simulation of these circuits with the LEVEL=2 MOSFET simulation models files provided using an Spice like simulator (for instance the evaluation kit of Pspice).
机译:通过VLSI CMOS 2.5#Mu#M Double-Poly-(CNM25)的示威者仅用于仅用于教学目的的中心Nacional de Microelectrona(CNM)。该示威者不仅可以通过外部连接使用简单模拟构建块和更复杂电路的测试,而且还允许通过外部连接的模拟,但是使用级别= 2 MOSFET仿真模型的模拟使用Simulator(例如评估套件的pspice)。

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