High-T_c superconductor circuit with an upper YBCO groundplane

摘要

We have developed a new multilayer structure for high-T_c superconductor (HTS) integrated circuits. In this structure, an HTS groundplane is placed on the Josephson junctions and the interconnections. Inductance of the interconnections was reduced to 1/3 the original value without any degradation in the junction and interconnection superconductivity characteristics, except for changes in the junction critical current. High reproducibility of the inductance value was confirmed in eleven wafers. This multilayer structure was applied to an HTS sampler circuit and the circuit operated correctly at a temperature of 50 K.