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An Application of 16-Valued Logic to Design of Reconfigurable Logic Arrays

机译:重构逻辑阵列设计16值逻辑的应用

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This paper presents a method to implement a reconfigurable logic array by using FPGA. 16-valued logic is introduced to design circuits with 2-valued 4-input LUTs. Symmetric functions and adders can be efficiently represented, as well as benchmark functions. Comparisons with 2-valued expressions and 4-valued expressions are done. Both sum-of-products expressions and EXOR sum-of-products expressions of 16-valued logic significantly reduces needed FPGA resources.
机译:本文介绍了一种使用FPGA实现可重构逻辑阵列的方法。将16值逻辑引入设计电路,使用2值4输入LUT。可以有效地表示对称函数和添加剂,以及基准函数。完成了具有2值表达和4个值表达的比较。产品均表达和EXOR-EXOR-of-Public表达式的16值逻辑显着降低了所需的FPGA资源。

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