Memristor-based Pass Gate Targeting FPGA Look-Up Table

摘要

This work proposes a memristor-based Pass Gate - mPG, as a primitive cell for translating memristor resistance states into logic targeting for FPGA Look-Up Tables (LUTs). The mPG consists of a pass transistor with buffers, and it can work with both binary and multibit memristors. The utilization of mPGs for the configuration bit storage in a new LUT architecture based on multibit memristors is introduced. Unlike other prior structures, the proposed architecture not only eliminates leakage current and extra sense amplifier/comparator circuitry but also prevents degrading memristor's characteristics; thus, more reliable systems can be developed. Simulation results show that the gate can be deployed for a wide range of memristor's resistance with a switching delay in the nanosecond range. Physical implementations of multibit memristor-based LUTs demonstrate that up to 80% of the design area and/or the number of transistors could be saved in comparison to standard SRAM-based designs. Furthermore, mPG-based design considerations are thoroughly analyzed and presented.