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32-bit SIMD SHARC architecture for digital audio signal processing applicatisn

机译:适用于数字音频信号处理的32位SIMD SHARC架构

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This paper examines desirable DSP architectureal featues to ocnsider for implementaiton of real time audio applciatiosn using a 32-bit Single Instruction Multiple Data (SIMD) DSP based on a Modified Harvard Architecture.This discussion will examine the specific features in this architecture tha tare diesireable for implemmenting many of today's professional and oncsumer audio equipment.The first tpic covered are the imoprtant adio prcessor-specific characterisitcs fo this SIMD architecture such as data word size,dynmaic range/SNR capabiliteis.menmory orgnaizaiton,processor speed,benechamrks and I/O capabilites Part Two will highlight a coule of example DSP audio algorihtms to demonstrater the benefits of such an architectue which cna speed up DSP execution by as much as a factor of 5 over earlier SISD SHARC architectures.
机译:本文研究了基于可修改的哈佛体系结构的32位单指令多数据(SIMD)DSP来实现实时音频应用的理想DSP体系结构功能。这是当今许多专业和家用音频设备的不二之选。第一个介绍的主题是此SIMD体系结构不适合的adio特定于处理器的特性,例如数据字大小,动态范围/ SNR能力。内存的组织结构,处理器速度,本能和I / O能力。第二部分将重点介绍示例DSP音频算法示例,以演示这种架构的好处,与早期的SISD SHARC架构相比,该架构可使DSP的执行速度提高5倍。

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