A methodology for first time correct gate array designs

摘要

Application Specific Integrated Circuits (ASICs) can bring manybenefits. There are however, some actual and perceived risks in usingthis `new' technology. In order to maximize the benefits of thetechnology, an ASIC design methodology must be developed which takesinto account differences between traditional PCB type development andASICs. This paper explores a suitable methodology, which has beenvalidated on a number of designs. The differences between traditionalPCB type developments and the design of ASICs is used as a basis forevolving a suitable methodology