Fine line/space IC substrate made by selectively fully additive process

摘要

Semi-Additive Process (SAP) had been used for making fine line/space organic substrate for decades. As the line/space trends down to below 10um/10um, there are many difficult process challenges such as the uneven substrate surface across large area of say 500mm??400mm for process tool with a small depth of focus to cover, and the process uniformity control for plating thickness, regardless of the high cost of process tool (ex: stepper). On the other hand, Cu damascene had been successfully used for sub-micron front-end IC circuitry fabrication. This process needs a very flat surface of substrate from CMP, prior to the ultra-fine circuit formation. The cost and quality control cannot be easily adopted by organic fine pitch substrates process for IC packaging. Therefore we proposed an innovative process of ???Selectively Fully Additive??? (SFA) to overcome above challenges posted by planarity and high cost issue. SFA process utilizes laser for embedded pattern trench in dielectric material layer and selectively electro-less deposition within the trenched area, the area without deposition is protected with anti-plating layer above the dielectric material. Besides, the depth of focus of laser is large enough to overcome uneven substrate issue, and the electro-less plating is reaction-controlled to achieve higher thickness uniformity. Thus the overall cost is significantly reduced by fewer process steps compared with SAP. The line/space of the substrate realized in this paper is both 5um/5um and 3um/3um, with dummy trace in 3um/3um. Test chip with Cu pillar is flip chip bonded onto the embedded circuit of packaging substrate, and verified with effective IMC bonding.