CMOS integrated circuits; analogue-digital conversion; comparators (circuits); semiconductor switches; CMOS process; analog-to-digital converter; conversion time; conversion-step SAR ADC; differential dynamic switches; digital-to-analog converter; double-boosted sampling switch; figure-of-merit; power 15.9 nW; rail-to-rail successive approximation register; size 0.18 mum; splitting capacitors; supply-boosted time-domain comparator; voltage 0.3 V; word length 10 bit; CMOS integrated circuits; Capacitors; Solid state circuits; Switches; Switching circuits; Time-domain analysis;
机译:采用0.18μmCMOS的10位20kS / s 17.7nW 9.1ENOB基准不敏感SAR ADC
机译:在0.18- $ muhbox {m} $ CMOS中的400nW 19.5-fJ /转换步骤8-ENOB 80-kS / s SAR ADC
机译:14.5 fJ /转换步长为90 nm CMOS的9位100-kS / s非二进制加权双电容阵列面积和节能SAR ADC
机译:0.3V 10位7.3FJ /转换步骤SAR ADC在0.18μmCMOS中
机译:一个0.18mm CMOS的600兆采样/秒的8位ADC。
机译:具有列并行12位SAR ADC的低噪声CMOS图像传感器的快速多重采样方法
机译:用于CMOS图像传感器的10位小区域低功率流水线SAR ADC