CMOS integrated circuits; Zigbee; body area networks; convolutional codes; forward error correction; low-power electronics; parity check codes; power consumption; CMOS technology; FEC candidate; IEEE 802.15.4g; IEEE 802.15.6; Viterbi decoder; bit rate 1 Mbit/s to 100 Mbit/s; body area network; error correcting performance; forward error correction; low power LDPC convolutional code decoder; power 0.5 mW to 9.9 mW; power consumption; shift-shared memory architecture; silicon area; size 90 nm; supply voltage; voltage 0.6 V; Convolutional codes; Decoding; Forward error correction; IEEE 802.15 Standards; Power demand; Semiconductor device measurement; Voltage measurement;
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