Novel target impedance for power distribution network of simultaneous switching output (SSO) buffers

机译：同步开关输出（SSO）缓冲器的配电网络的新型目标阻抗

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The output voltages at parallel simultaneous switching output (SSO) channels are affected by impedance of power distribution network (PDN) and SSO patterns. In this paper, a target impedance for PDN is directly extracted from the allowable signal output variations due to the SSO patterns.

机译：并行同时切换输出（SSO）通道的输出电压受到配电网络（PDN）和SSO模式的阻抗的影响。在本文中，由于SSO图案，从允许的信号输出变化直接提取PDN的目标阻抗。

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《IEEE Electrical Design of Advanced Packaging and Systems Symposium》|2014年|81-84|共4页
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Jingook Kim; Eunkyeong Park; JongJoo Lee; Kwangsoo Park; Youngwoo Park;
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buffer circuits; distribution networks; electric impedance; output voltages; power distribution network; signal output variations; simultaneous switching output buffers; target impedance; Capacitors; Impedance; Integrated circuit modeling; Noise; Switches; System-on-chip; Transfer functions; decoupling capacitor; power distribution network (PDN); simultaneous switching noise (SSO); target impedance;

机译：缓冲电路;配电网络;电阻抗;输出电压;配电网络;信号输出变化;同时开关输出缓冲器;目标阻抗;电容器;阻抗;集成电路建模;噪声;开关;片上系统;传输功能;去耦电容器;配电网（PDN）;同时开关噪声（SSO）;目标阻抗;

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专利

1. Statistical Eye-Diagram Estimation Method Considering Power/Ground Noise Induced by Simultaneous Switching Output (SSO) Buffers [J] . Youngwoo Kim, Junyong Park, Joungho Kim, Electromagnetic Compatibility, IEEE Transactions on . 2020,第6期

机译：考虑通过同时切换输出（SSO）缓冲器引起的电源/地噪声的统计眼图估计方法
2. Statistical Analysis for Pattern-Dependent Simultaneous Switching Outputs (SSO) of Parallel Single-Ended Buffers [J] . Jingook Kim IEEE transactions on circuits and systems . I , Regular papers . 2017,第1期

机译：并行单端缓冲器的模式相关同步开关输出（SSO）的统计分析
3. Estimation of Simultaneous Switching Noise From Frequency-Domain Impedance Response of Resonant Power Distribution Networks [J] . Kim W. Components, Packaging and Manufacturing Technology, IEEE Transactions on . 2011,第9期

机译：从谐振配电网的频域阻抗响应估计同时开关噪声
4. Novel target impedance for power distribution network of simultaneous switching output (SSO) buffers [C] . Jingook Kim, Eunkyeong Park, JongJoo Lee, IEEE Electrical Design of Advanced Packaging and Systems Symposium . 2014

机译：用于同时切换输出（SSO）缓冲器的配电网络的新型目标阻抗
5. Modeling of simultaneous switching noise in on-chip and package power distribution networks using conformal mapping, finite difference time domain and cavity resonator methods. [D] . Mao, Jifeng. 2004

机译：使用共形映射，有限差分时域和腔谐振器方法对片上和封装配电网络中的同时开关噪声建模。
6. Ultra-low Output Impedance RF Power Amplifier for Parallel Excitation [O] . Xu Chu, Xing Yang, Yunfeng Liu, -1

机译：用于并联励磁的超低输出阻抗RF功率放大器
7. Simultaneous Switching Noise in On-Chip CMOS Power Distribution Networks [O] . 2008

机译：片上CmOs配电网络中的同时开关噪声

Novel target impedance for power distribution network of simultaneous switching output (SSO) buffers

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