a-SAD: Power efficient SAD calculator for real time H.264 video encoder using MSB-approximation technique

摘要

We propose a power efficient SAD calculator, namely a-SAD. We use MSB-approximation where some highest-order MSB's are approximated to single MSB. Our theoretical analysis shows that this technique simultaneously improves performance and power of SAD circuit. We obtain optimal number of approximated MSB's from video experiments, which is the largest number not to affect video compression rate. In our simulations, our a-SAD circuit delivers higher performance compared to previous SAD circuits. We compare power dissipation under iso-performance scenario, where our a-SAD circuit shows 27% power saving compared to a previous design.