A New Topology of Multilevel Inverter with Reduced Number of Switches and Increased Efficiency

摘要

This paper proposes a new topology of multilevel inverter in which the number of switches are reduced as compared to cascaded H bridge inverter and with less control complexity. The new topology of multilevel inverter is having a 15 level basic unit and three asymmetrical voltage sources in the ratio 1:2:4. The efficiency analysis of the new topology is carried out in this paper and is compared with reported multilevel inverters. The study in MATLAB/SIMULINK platform and hardware is done for result verification and results validate the theoretical results obtained.