A basic building block approach to CMOS design of analogneuro/fuzzy systems

摘要

Outlines a systematic approach to design fuzzy inference systemsusing analog integrated circuits in standard CMOS VLSI technologies. Theproposed circuit building blocks are arranged in a layered neuro/fuzzyarchitecture composed of 5 layers: fuzzification, T-norm, normalization,consequent, and output. Inference is performed by using Takagi andSugeno's (1989) IF-THEN rules, particularly where the rule's outputcontains only a constant term-a singleton. A simple CMOS circuit withtunable bell-like transfer characteristics is used for thefuzzification. The inputs to this circuit are voltages while the outputsare currents. Circuit blocks proposed for the remaining layers operatein the current-mode domain. Innovative circuits are proposed for theT-norm and normalization layers. The other two layers use currentmirrors and KCL. All the proposed circuits emphasize simplicity at thecircuit level-a prerequisite to increasing system level complexity andoperation speed. A 3-input, 4-rule controller has been designed fordemonstration purposes in a 1.6 μm CMOS single-poly, double-metaltechnology. We include measurements from prototypes of the membershipfunction block and detailed HSPICE simulations of the whole controller.These results operation speed in the range of 5 MFLIPS (million fuzzylogic inferences per second) with systematic errors below 1%