Gradient method based design methodology for time and areaoptimization of a pipelined attached processor architecture

摘要

A procedure for producing a design of a pipelined attachedprocessor is described. It assumes that a set of algorithms and theirfrequencies of execution are specified. Then it determines designs thattend to minimize the execution time-cost product and executiontime2-cost product, using gradient methods involving steepestdescent. The designs are produced by allocating hardware subsystems suchas memory subsystems, processors and routers subject to user resourceconstraints. The processors are assumed to be constructed of dynamicmemory-to-memory pipelines