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Bounding switching activity in CMOS circuits using constraintresolution

机译:使用约束条件限制CMOS电路的开关活动解析度

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This paper deals with the problem of estimating the average powerconsumption (per clock cycle) of CMOS digital circuits. A newpattern-independent method is proposed for computing an upper bound onthe switching activity, and therefore the average power of acombinational circuit described at the gate level. The method is basedon the propagation of abstract waveform sets, described down to thelevel of individual transitions. The view of a gate as a relationbetween input and output signals, described by forward and partialinverse functions, permits the determination of a tight upper bound onthe power using a constraint resolution method based on waveformnarrowing. A fully scalable, case analysis-based algorithm provides atany step an upper bound and, with enough resources (CPU time), it cancontinue up to the exact solution. The paper presents the theoreticalbackground, a description of the implementation, and results onbenchmark circuits
机译:本文涉及估计平均功率的问题 CMOS数字电路的功耗(每个时钟周期)。一个新的 提出了一种与模式无关的方法来计算 开关活动,以及因此的平均功率 栅极级描述的组合电路。该方法是基于 关于抽象波形集的传播,描述如下 个别过渡的水平。门的关系 在输入和输出信号之间,用正向和局部描述 逆函数,允许确定一个严格的上限 使用基于波形的约束解析方法计算功率 缩小。完全可扩展的基于案例分析的算法可提供 任何一个步骤的上限,只要有足够的资源(CPU时间),它就可以 继续寻找确切的解决方案。本文介绍了理论 背景,实施说明和结果 基准电路

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