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Wafer-level inspection platform on high-volume photonic integrated circuits for drastic reduction of testing time

机译:大容量光子集成电路上的晶圆级检测平台,可大幅减少测试时间

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We describe a wafer prober integrated with an optical probe for wafer-level inspection of photonic integrated circuits.The design of the electric and photonic circuit was optimized for wafer-level inspection. The customized prober andcircuit design enabled us to perform high-volume and high-speed inspection of over 400 elements, and sufficientlyreliable results were obtained. It took about 10 sec. to evaluate the propagation loss of an element. This technology willbe a key to reducing the costs of photonic devices.
机译:我们描述了与光探测器集成在一起的晶片探测器,用于光子集成电路的晶片级检查。 电气和光子电路的设计已针对晶圆级检查进行了优化。定制的探测器和 电路设计使我们能够对400多种元件进行大批量和高速检查,并且足够 获得了可靠的结果。花了大约10秒钟。评估元素的传播损耗。这项技术将 成为降低光子设备成本的关键。

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