An integrated circuit for the in situ characterization of CMOSbest-process micromachining

摘要

We have developed an integrated circuit for in situ monitoring andcharacterization of CMOS post-process micromachining. In ourdemonstration, the circuit provides automated readout of N-wellresistors surrounding each of 140 micromachining test structures at upto 14,000 samples per second per device during the post-process siliconetch. We use this circuit to examine the effect of pit size, surroundingthin film layers, and topography in a 2 μm CMOS process with a XeF₂ post-process step, although the circuit and results are ofuse to EDP, TMAH, and plasma post-processing