A New Reduced Switch Diode Clamped Multilevel Inverter Topology

摘要

In this work, a new diode clamped multilevel inverter topology with reduced switches and component counts is proposed. This topology can generate desired level of output voltages with lower number of switches and clamping diodes. A scaled version of the proposed topology is discussed with relevant figures of merits. Two different levels of inverters (5 & 7 levels) are designed and investigated with resistive and inductive loads to confirm the required operation of the proposed topology. High frequency multicarrier pulse width modulation (MCPWM) techniques are used to control the modulation strategy for the suggested reduced switch diode clamped multilevel inverter (RSDCMLI). The performance is evaluated in terms of total harmonic distortion (THD) for different MCPWM techniques for the proposed RSDCMLI. The proposed inverter is suitable for medium and high-power industrial drives especially in the field of renewable energy conversion with reduced component counts entitled to low conversion loss.